2778 search results - page 276 / 556 » Reuse Technique in Hardware Design |
170
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FPL
2003
Springer
15 years 11 months ago
2003
Springer
The first successful FPGA implementation [1] of artificial neural networks (ANNs) was published a little over a decade ago. It is timely to review the progress that has been made i...
148
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DAC
2005
ACM
15 years 8 months ago
2005
ACM
In this paper, we introduce a new watermarking system for IP protection on post-layout design phase. Firstly the copyright is encrypted by DES (Data Encryption Standard) and then ...
155
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FCCM
2007
IEEE
16 years 28 days ago
2007
IEEE
This paper provides an evaluation of SGI® RASC™ RC100 technology from a computational science software developer’s perspective. A brute force implementation of a two-point an...
128
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ISSS
2002
IEEE
15 years 11 months ago
2002
IEEE
This paper proposes an original model of the execution time of assembly instructions in superscalar architectures. The approach is based on a rigorous mathematical model and provi...
170
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ISCAPDCS
2001
15 years 8 months ago
2001
-Multi-dimensional applications, such as image processing and seismic analysis, usually require the optimized performance obtained from instruction-level parallelism. The critical ...