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» Reuse Technique in Hardware Design
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ISQED
2009
IEEE
86views Hardware» more  ISQED 2009»
16 years 1 months ago
Uncriticality-directed scheduling for tackling variation and power challenges
The advance in semiconductor technologies presents the serious problem of parameter variations. They affect threshold voltage of transistors and thus circuit delay has variability...
Toshinori Sato, Shingo Watanabe
ICCD
2007
IEEE
182views Hardware» more  ICCD 2007»
16 years 26 days ago
Reducing leakage power in peripheral circuits of L2 caches
Leakage power has grown significantly and is a major challenge in microprocessor design. Leakage is the dominant power component in second-level (L2) caches. This paper presents t...
Houman Homayoun, Alexander V. Veidenbaum
ICECCS
2000
IEEE
133views Hardware» more  ICECCS 2000»
15 years 11 months ago
An Analysis Tool for Coupling-Based Integration Testing
This research is part of a project to develop practical, effective, formalizable, automatable techniques for integration testing. Integration testing is an important part of the t...
A. Jefferson Offutt, Aynur Abdurazik, Roger T. Ale...
ICECCS
1996
IEEE
209views Hardware» more  ICECCS 1996»
15 years 10 months ago
Coupling-based Integration Testing
This research is part of a project to develop practical, effective, formalizable, automatable techniques for integration testing. Integration testing is an important part of the t...
Zhenyi Jin, A. Jefferson Offutt
MTV
2003
IEEE
154views Hardware» more  MTV 2003»
15 years 11 months ago
Tuning the VSIDS Decision Heuristic for Bounded Model Checking
Bounded Model Checking (BMC) techniques have been used for formal hardware verification, with the help of tools such as GRASP (Generic search Algorithm for Satisfiability Proble...
Ohad Shacham, Emmanuel Zarpas