2778 search results - page 222 / 556 » Reuse Technique in Hardware Design |
114
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ICCD
2007
IEEE
16 years 25 days ago
2007
IEEE
A methodology for constructing circuit-level mismatch models and performing yield optimization is presented for CMOS analog circuits. The methodology combines statistical techniqu...
168
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ICCAD
1999
IEEE
15 years 10 months ago
1999
IEEE
This paper addresses an optimal technique for throughput optimization of general non-linear data flow computations using a set of transformations. Throughput is widely recognized ...
205
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FIDJI
2003
Springer
15 years 11 months ago
2003
Springer
The popular slogan ”write once, run anywhere” effectively renders the expressive capabilities of the Java programming framework for developing, deploying, and reusing target-i...
161
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JILP
2002
15 years 6 months ago
2002
As microprocessor designs continue to evolve, many optimizations reach a point of diminishing returns. We introduce HLS, a hybrid processor simulator which uses statistical models...
160
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CHI
2005
ACM
16 years 6 months ago
2005
ACM
We present a new interaction technique for large directtouch displays called Modal Spaces. Modal interfaces require the user to keep track of the state of the system. The Modal Sp...