2778 search results - page 218 / 556 » Reuse Technique in Hardware Design |
154
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IPPS
2005
IEEE
16 years 2 days ago
2005
IEEE
A new high performance computation technique involving multiple processors on a single silicon die is quickly gaining popularity. This new design approach provides very high perfo...
146
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DATE
2003
IEEE
15 years 11 months ago
2003
IEEE
This paper presents a new technique for automatically creating analog circuit models. The method extracts - from trained neural networks - piecewise linear models expressing the l...
156
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DATE
2002
IEEE
15 years 11 months ago
2002
IEEE
Phased logic has been proposed as a technique for realizing self-timed circuitry that is delay-insensitive and requires no global clock signals. Early evaluation techniques have b...
192
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ASPDAC
2001
ACM
15 years 10 months ago
2001
ACM
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...
185
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CAV
2008
Springer
15 years 8 months ago
2008
Springer
This paper proposes a new approach for proving arithmetic correctness of data paths in System-on-Chip modules. It complements existing techniques which are, for reasons of complexi...