2778 search results - page 216 / 556 » Reuse Technique in Hardware Design |
162
click to vote
ISCA
2000
IEEE
15 years 11 months ago
2000
IEEE
Speculative parallelization aggressively executes in parallel codes that cannot be fully parallelized by the compiler. Past proposals of hardware schemes have mostly focused on si...
176
click to vote
MICRO
2000
IEEE
15 years 11 months ago
2000
IEEE
Value prediction breaks data dependencies in a program thereby creating instruction level parallelism that can increase program performance. Hardware based value prediction techni...
173
click to vote
ARC
2006
Springer
15 years 10 months ago
2006
Springer
We introduce a new paradigm in the computer architecture referred to as Polymorphic Instruction Set Computers (PISC). This new paradigm, in difference to RISC/CISC, introduces hard...
181
click to vote
EUROMICRO
2005
IEEE
16 years 3 days ago
2005
IEEE
State-of-the-art middleware and component technologies lack support for Quality of Service (QoS) management. Application developers, therefore, integrate QoS mechanisms into the a...
183
click to vote
ICCAD
2009
IEEE
15 years 4 months ago
2009
IEEE
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...