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» Reuse Technique in Hardware Design
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ICPP
2009
IEEE
15 years 4 months ago
Thread Merging Schemes for Multithreaded Clustered VLIW Processors
Several multithreading techniques have been proposed to reduce the resource underutilization in Very Long Instruction Word (VLIW) processors. Simultaneous MultiThreading (SMT) is ...
Manoj Gupta, Fermín Sánchez, Josep L...
GLVLSI
2006
IEEE
124views VLSI» more  GLVLSI 2006»
16 years 16 days ago
Dominator-based partitioning for delay optimization
Most of the logic synthesis algorithms are not scalable for large networks and, for this reason, partitioning is often applied. However traditional mincut-based partitioning techn...
David Bañeres, Jordi Cortadella, Michael Ki...
ICPADS
2006
IEEE
16 years 16 days ago
Coloring the Internet: IP Traceback
Several IP Traceback schemes employing packet marking have been proposed to trace DoS/DDoS attacks that use source address spoofing. The major challenges in the design of an ef...
Muthusrinivasan Muthuprasanna, G. Manimaran, Manso...
EWCBR
2008
Springer
15 years 8 months ago
Real-Time Plan Adaptation for Case-Based Planning in Real-Time Strategy Games
Abstract. Case-based planning (CBP) is based on reusing past successful plans for solving new problems. CBP is particularly useful in environments where the large amount of time re...
Neha Sugandh, Santiago Ontañón, Ashw...
STVR
2002
88views more  STVR 2002»
15 years 6 months ago
Empirical studies of test-suite reduction
Test-suite reduction techniques attempt to reduce the costs of saving and reusing test cases during software maintenance by eliminating redundant test cases from test suites. A po...
Gregg Rothermel, Mary Jean Harrold, Jeffery von Ro...