Abstract– This paper presents an improved topological algorithm for device-level analog placement with symmetry constraints. Based on the exploration of symmetric-feasible sequen...
Karthik Krishnamoorthy, Sarat C. Maruvada, Florin ...
This paper presents a configuration memory architecture that offers fast FPGA reconfiguration. The underlying principle behind the design is the use of fine-grained partial rec...
With the increase of design complexities and the decrease of minimal feature sizes, IP reuse is becoming a common practice while crosstalk is becoming a critical issue that must b...
Stencil-based kernels constitute the core of many scientific applications on block-structured grids. Unfortunately, these codes achieve a low fraction of peak performance, due pr...
Shoaib Kamil, Kaushik Datta, Samuel Williams, Leon...
Live Sequence Charts (LSCs) are a broad extension to Message Sequence Charts (MSCs) to capture complex interobject communication rigorously. A tool support for LSCs, named PlayEng...