2778 search results - page 189 / 556 » Reuse Technique in Hardware Design |
173
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CW
2005
IEEE
16 years 1 days ago
2005
IEEE
Imagination and creativity have always marked the path in the world of aesthetics; artists, designers and other creative individuals have found in the realm of computers a new can...
161
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DATE
2005
IEEE
16 years 1 days ago
2005
IEEE
Triple Modular Redundancy (TMR) is a suitable fault tolerant technique for SRAM-based FPGA. However, one of the main challenges in achieving 100% robustness in designs protected b...
225
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SIGMETRICS
2008
ACM
15 years 6 months ago
2008
ACM
In this paper, we consider hybrid peer-to-peer systems where users form an unstructured peer-to-peer network with the purpose of assisting a server in the distribution of data. We...
132
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FPL
2003
Springer
15 years 11 months ago
2003
Springer
Abstract. Globally Asynchronous Locally Synchronous (GALS) Systems have provoked renewed interest over recent years as they have the potential to combine the benefits of asynchron...
153
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ICCAD
2005
IEEE
16 years 3 months ago
2005
IEEE
— The flip-chip package gives the highest chip density of any packaging method to support the pad-limited Application-Specific Integrated Circuit (ASIC) designs. In this paper,...