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DATE
2010
IEEE
139views Hardware» more  DATE 2010»
15 years 9 months ago
Finding reset nondeterminism in RTL designs - scalable X-analysis methodology and case study
Due to increases in design complexity, routing a reset signal to all registers is becoming more difficult. One way to solve this problem is to reset only certain registers and rely...
Hong-Zu Chou, Haiqian Yu, Kai-Hui Chang, Dylan Dob...
ICCAD
2008
IEEE
127views Hardware» more  ICCAD 2008»
16 years 3 months ago
Design and optimization of a digital microfluidic biochip for protein crystallization
Proteins crystallization is a commonly used technique for protein analysis and subsequent drug design. It predicts the three-dimensional arrangement of the constituent amino acids...
Tao Xu, Krishnendu Chakrabarty, Vamsee K. Pamula
DATE
2009
IEEE
87views Hardware» more  DATE 2009»
16 years 1 months ago
Multi-clock Soc design using protocol conversion
The automated design of SoCs from pre-selected IPs that may require different clocks is challenging because of the following issues. Firstly, protocol mismatches between IPs need ...
Roopak Sinha, Partha S. Roop, Samik Basu, Zoran Sa...
DATE
2005
IEEE
134views Hardware» more  DATE 2005»
16 years 1 days ago
Assertion-Based Design Exploration of DVS in Network Processor Architectures
With the scaling of technology and higher requirements on performance and functionality, power dissipation is becoming one of the major design considerations in the development of...
Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang 000...
DATE
2010
IEEE
146views Hardware» more  DATE 2010»
15 years 11 months ago
Leveraging application-level requirements in the design of a NoC for a 4G SoC - a case study
—In this paper, we examine the design process of a Network on-Chip (NoC) for a high-end commercial System onChip (SoC) application. We present several design choices and focus on...
Rudy Beraha, Isask'har Walter, Israel Cidon, Avino...