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» Reuse Technique in Hardware Design
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DATE
2004
IEEE
110views Hardware» more  DATE 2004»
15 years 10 months ago
Interactive Cosimulation with Partial Evaluation
We present a technique to improve the efficiency of hardware-software cosimulation, using design information known at simulator compile-time. The generic term for such optimizatio...
Patrick Schaumont, Ingrid Verbauwhede
FCCM
2004
IEEE
118views VLSI» more  FCCM 2004»
15 years 10 months ago
Virtual Memory Window for a Portable Reconfigurable Cryptography Coprocessor
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
DAC
2001
ACM
16 years 7 months ago
Watermarking Graph Partitioning Solutions
Trends in the semiconductor industry towards extensive design and code reuse motivate a need for adequate Intellectual Property Protection (IPP) schemes. We offer a new general IP...
Gregory Wolfe, Jennifer L. Wong, Miodrag Potkonjak
ERLANG
2004
ACM
15 years 12 months ago
Structured programming using processes
Structured Programming techniques are applied to a personal accounting software application implemented in erlang as a demonstration of the utility of processes as design construc...
Jay Nelson
AVI
2006
15 years 7 months ago
Programming rich interactions using the hierarchical state machine toolkit
Structured graphics models such as Scalable Vector Graphics (SVG) enable designers to create visually rich graphics for user interfaces. Unfortunately current programming tools ma...
Renaud Blanch, Michel Beaudouin-Lafon