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ISCA
1997
IEEE
135views Hardware» more  ISCA 1997»
15 years 10 months ago
The Design and Analysis of a Cache Architecture for Texture Mapping
The effectiveness of texture mapping in enhancing the realism of computer generated imagery has made support for real-time texture mapping a critical part of graphics pipelines. D...
Ziyad S. Hakura, Anoop Gupta
FDL
2003
IEEE
15 years 11 months ago
Object-Oriented ASIP Design and Synthesis
SystemC-Plus from the ODETTE project provides the ability to simulate and synthesise object-oriented specifications into hardware. The current ODETTE compiler translates each obj...
Maziar Goudarzi, Shaahin Hessabi, Alan Mycroft
DAC
2006
ACM
16 years 12 days ago
Use of C/C++ models for architecture exploration and verification of DSPs
Architectural decisions for DSP modules are often analyzed using high level C models. Such high-level explorations allow early examination of the algorithms and the architectural ...
David Brier, Raj S. Mitra
ICCAD
2007
IEEE
115views Hardware» more  ICCAD 2007»
16 years 3 months ago
Timing optimization by restructuring long combinatorial paths
—We present an implementation of an algorithm for constructing provably fast circuits for a class of Boolean functions with input signals that have individual starting times. We ...
Jürgen Werber, Dieter Rautenbach, Christian S...
ISCAS
2002
IEEE
94views Hardware» more  ISCAS 2002»
15 years 11 months ago
A robust self-resetting CMOS 32-bit parallel adder
This paper presents new circuit configurationsfor a more robust and efficient form of self-resettingCMOS (SRCMOS). Prior structures for SRCMOS have very high performance but are...
Gunok Jung, V. A. Sundarajan, Gerald E. Sobelman