2778 search results - page 173 / 556 » Reuse Technique in Hardware Design |
151
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ISCAS
2007
IEEE
16 years 21 days ago
2007
IEEE
– In the sub-65 nm CMOS technologies, subthreshold and gate dielectric leakage currents need to be simultaneously suppressed for effective energy reduction. New low-leakage circu...
324
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ISPD
2012
ACM
14 years 2 months ago
2012
ACM
As technology scales and frequency increases, a new design style is emerging, referred to as hybrid designs, which contain a mixture of random logic and datapath standard cell com...
165
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MEMOCODE
2007
IEEE
16 years 21 days ago
2007
IEEE
New to the 2007 MEMOCODE conference is the HW/SW Co-Design Contest. Members of the technical and steering committees from MEMOCODE 2006 thought that the co-design practice is dist...
160
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DDECS
2008
IEEE
16 years 26 days ago
2008
IEEE
—Temperature has become an important issue in nowadays MPSoCs design due to the ever increasing power densities and huge energy consumption. This paper proposes a temperature-awa...
138
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ICCAD
2005
IEEE
16 years 3 months ago
2005
IEEE
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...