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» Reuse Technique in Hardware Design
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POPL
2007
ACM
16 years 6 months ago
Geometry of synthesis: a structured approach to VLSI design
We propose a new technique for hardware synthesis from higherorder functional languages with imperative features based on Reynolds's Syntactic Control of Interference. The re...
Dan R. Ghica
JUCS
2010
143views more  JUCS 2010»
15 years 4 months ago
Design of Arbiters and Allocators Based on Multi-Terminal BDDs
: Assigning one (more) shared resource(s) to several requesters is a function of arbiters (allocators). This class of decision-making modules can be implemented in a number of ways...
Václav Dvorák, Petr Mikusek
EUROMICRO
2005
IEEE
16 years 22 hour ago
QoSOnt: a QoS Ontology for Service-Centric Systems
This paper reports on the development of QoSOnt: an ontology for Quality of Service (QoS). Particular focus is given to its application in the field of service-centric systems. Qo...
Glen Dobson, Russell Lock, Ian Sommerville
IEEEPACT
2009
IEEE
15 years 4 months ago
Algorithmic Skeletons within an Embedded Domain Specific Language for the CELL Processor
Efficiently using the hardware capabilities of the Cell processor, a heterogeneous chip multiprocessor that uses several levels of parallelism to deliver high performance, and bei...
Tarik Saidani, Joel Falcou, Claude Tadonki, Lionel...
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
15 years 12 months ago
A non-uniform cache architecture for low power system design
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
Tohru Ishihara, Farzan Fallah