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DFT
2003
IEEE
117views VLSI» more  DFT 2003»
15 years 11 months ago
Fault Tolerant Design of Combinational and Sequential Logic Based on a Parity Check Code
We describe a method for designing fault tolerant circuits based on an extension of a Concurrent Error Detection (CED) technique. The proposed extension combines parity check code...
Sobeeh Almukhaizim, Yiorgos Makris
ISMVL
2002
IEEE
106views Hardware» more  ISMVL 2002»
15 years 11 months ago
Design of Ternary Schmitt Triggers Based on Its Sequential Characteristics
By analyzing the working characteristics of binary Schmitt circuits we find their sequential characteristics, which makes us follow the method of sequential circuits to design Sch...
Yinshui Xia, Xunwei Wu, Penjung Wang
ICSE
2008
IEEE-ACM
16 years 7 months ago
Design and implementation of the software architecture for a 3-D reconstruction system in medical imaging
The design and implementation of the reconstruction system in medical X-ray imaging is a challenging issue due to its immense computational demands. In order to ensure an efficien...
Holger Scherl, Stefan Hoppe, Markus Kowarschik, Jo...
ISCAS
2003
IEEE
106views Hardware» more  ISCAS 2003»
15 years 11 months ago
Design of a digital reaction-diffusion system for restoring blurred fingerprint images
This paper presents an algorithm for fingerprint image restoration using a Digital Reaction-Diffusion System (DRDS). The DRDS is a model of a discrete-time discrete-space nonline...
Koichi Ito, Takafumi Aoki, Tatsuo Higuchi
ISCAS
2007
IEEE
113views Hardware» more  ISCAS 2007»
16 years 21 days ago
Design Considerations for Future RF Circuits
TheRFdesignparadigm will changesignificantly asCMOS technology scales and integration levels rise to accommodate multi-band, multi-mode transceivers and baseband processors. This...
Behzad Razavi