2778 search results - page 149 / 556 » Reuse Technique in Hardware Design |
155
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ITC
1998
IEEE
15 years 10 months ago
1998
IEEE
The main objective of core-based IC design is improvement of design efficiency and time-to-market. In order to prevent test development from becoming the bottleneck in the entire ...
128
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ISPD
1998
ACM
15 years 10 months ago
1998
ACM
This paper describes an important new facility for timing-driven design applications within the new CHDStd standard for a SEMATECH design system for large complex chips. We first ...
136
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CLUSTER
2000
IEEE
15 years 10 months ago
2000
IEEE
Most clusters so far have used WAN or LAN-based network products for communication due to their market availability. However, they do not always match communication patterns in cl...
145
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ISCA
2005
IEEE
15 years 12 months ago
2005
IEEE
As chip densities and clock rates increase, processors are becoming more susceptible to transient faults that can affect program correctness. Up to now, system designers have prim...
159
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HPCA
2004
IEEE
16 years 6 months ago
2004
IEEE
As microprocessors become increasingly complex, the techniques used to analyze and predict their behavior must become increasingly rigorous. This paper applies wavelet analysis te...