2778 search results - page 147 / 556 » Reuse Technique in Hardware Design |
160
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ICCAD
1994
IEEE
15 years 10 months ago
1994
IEEE
Language containment is a method for design verification that involves checking if the behavior of the system to be verified is a subset of the behavior of the specifications (pro...
172
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ISLPED
2007
ACM
15 years 8 months ago
2007
ACM
Dynamic voltage scaling (DVS) is known to be one of the most efficient techniques for power reduction of integrated circuits. Efficient low voltage DC-DC conversion is a key enabl...
159
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ATVA
2009
Springer
15 years 10 months ago
2009
Springer
We present a framework for certifying hardware designs generated through behavioral synthesis, by using formal verification to certify the associated synthesis transformations. We ...
181
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ISLPED
2007
ACM
15 years 8 months ago
2007
ACM
Negative bias temperature instability (NBTI) has become a dominant reliability concern for nanoscale PMOS transistors. In this paper, we propose variable-latency adder (VL-adder) ...
175
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DFT
2003
IEEE
15 years 11 months ago
2003
IEEE
This paper presents an approach for integrating fault-tolerance techniques into microprocessors by utilizing instruction redundancy as well as time redundancy. Smaller and smaller...