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» Reuse Technique in Hardware Design
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ASAP
2005
IEEE
108views Hardware» more  ASAP 2005»
15 years 12 months ago
Using Symbolic Feasibility Tests during Design Space Exploration of Heterogeneous Multi-Processor Systems
The task of automatic design space exploration of heterogeneous multi-processor systems is often tackled with Evolutionary Algorithms. In this paper, we propose a novel approach i...
Thomas Schlichter, Christian Haubelt, Frank Hannig...
AHS
2007
IEEE
349views Hardware» more  AHS 2007»
16 years 21 days ago
A Low Power Implementation of H.264 Adaptive Deblocking Filter Algorithm
In this paper, we present a low power implementation of H.264 adaptive deblocking filter (DBF) algorithm on ARM Versatile / PB926EJ-S Development Board. The DBF hardware is implem...
Mustafa Parlak, Ilker Hamzaoglu
IUI
2005
ACM
15 years 12 months ago
TaskTracer: a desktop environment to support multi-tasking knowledge workers
This paper reports on TaskTracer — a software system being designed to help highly multitasking knowledge workers rapidly locate, discover, and reuse past processes they used to...
Anton N. Dragunov, Thomas G. Dietterich, Kevin Joh...
ASPDAC
2008
ACM
104views Hardware» more  ASPDAC 2008»
15 years 8 months ago
Variability-driven module selection with joint design time optimization and post-silicon tuning
Abstract-- Increasing delay and power variation are significant challenges to the designers as technology scales to the deep sub-micron (DSM) regime. Traditional module selection t...
Feng Wang 0004, Xiaoxia Wu, Yuan Xie
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
15 years 10 months ago
Improving coverage analysis and test generation for large designs
State space techniques have proven to be useful for measuring and improving the coverage of test vectors that are used during functional validation via simulation. By comparing th...
Jules P. Bergmann, Mark Horowitz