Sciweavers

2778 search results - page 131 / 556
» Reuse Technique in Hardware Design
Sort
View
ASPDAC
2000
ACM
95views Hardware» more  ASPDAC 2000»
15 years 10 months ago
Fair watermarking techniques
Many intellectual property protection (IPP) techniques have been proposed. Their primary objectives are providing convincible proof of authorship with least degradation of the qua...
Gang Qu, Jennifer L. Wong, Miodrag Potkonjak
ASPDAC
2009
ACM
110views Hardware» more  ASPDAC 2009»
16 years 25 days ago
Variability-aware robust design space exploration of chip multiprocessor architectures
Abstract— In the context of a design space exploration framework for supporting the platform-based design approach, we address the problem of robustness with respect to manufactu...
Gianluca Palermo, Cristina Silvano, Vittorio Zacca...
AICCSA
2006
IEEE
90views Hardware» more  AICCSA 2006»
16 years 12 days ago
ICE: A System for Identification of Conflicts in Exams
Although E-learning has advanced considerably in the last decade, some of its aspects, such as E-testing, are still in the development phase. Authoring tools and test banks for E-...
Hicham Hage, Esma Aïmeur
ASYNC
1997
IEEE
140views Hardware» more  ASYNC 1997»
15 years 10 months ago
The Design and Verification of A High-Performance Low-Control-Overhead Asynchronous Differential Equation Solver
Abstract-This paper describes the design and verification of a high-performance asynchronous differential equation solver benchmark circuit. The design has low control overhead whi...
Kenneth Y. Yun, Ayoob E. Dooply, Julio Arceo, Pete...
CAV
2008
Springer
99views Hardware» more  CAV 2008»
15 years 8 months ago
Functional Verification of Power Gated Designs by Compositional Reasoning
Power gating is a technique for low power design in which whole sections of the chip are powered off when they are not needed, and powered back on when they are. Functional correct...
Cindy Eisner, Amir Nahir, Karen Yorav