2778 search results - page 126 / 556 » Reuse Technique in Hardware Design |
171
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DATE
2004
IEEE
15 years 10 months ago
2004
IEEE
There has been considerable research on quantum dots cellular automata as a new computing scheme in the nano-scale regimes. The basic logic element of this technology is a majorit...
171
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EH
2005
IEEE
15 years 12 months ago
2005
IEEE
This paper proposes an original approach to the reliability analysis for Embryonics [4], by introducing the accuracy threshold measure, borrowed from fault-tolerant quantum comput...
160
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DATE
2003
IEEE
15 years 11 months ago
2003
IEEE
We present a visualization tool called PLFire, which allows a user to observe the behavior of a Phased Logic (PL) circuit. Phased logic is a technique for realizing self-timed cir...
135
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ASPDAC
2007
ACM
15 years 10 months ago
2007
ACM
This paper presents a very efficient algorithm for performance-driven topology design for interconnects. Given a net, it first generates A-tree1 topology using table lookup and net...
162
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DATE
2004
IEEE
15 years 10 months ago
2004
IEEE
This paper describes a novel design methodology to implement a secure DPA resistant crypto processor. The methodology is suitable for integration in a common automated standard ce...