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» Reuse Technique in Hardware Design
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ICCD
2007
IEEE
157views Hardware» more  ICCD 2007»
16 years 3 months ago
Combining cluster sampling with single pass methods for efficient sampling regimen design
Microarchitectural simulation is orders of magnitude slower than native execution. As more elements are accurately modeled, problems associated with slow simulation are further ex...
Paul D. Bryan, Thomas M. Conte
DATE
2009
IEEE
90views Hardware» more  DATE 2009»
16 years 1 months ago
Property analysis and design understanding
—Verification is a major issue in circuit and system design. Formal methods like bounded model checking (BMC) can guarantee a high quality of the verification. There are severa...
Ulrich Kühne, Daniel Große, Rolf Drechs...
ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
15 years 10 months ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah
DATE
2009
IEEE
135views Hardware» more  DATE 2009»
16 years 1 months ago
Gate replacement techniques for simultaneous leakage and aging optimization
—1As technology scales, the aging effect caused by Negative Bias Temperature Instability (NBTI) has become a major reliability concern for circuit designers. On the other hand, r...
Yu Wang 0002, Xiaoming Chen, Wenping Wang, Yu Cao,...
IOLTS
2002
IEEE
148views Hardware» more  IOLTS 2002»
15 years 11 months ago
Active Replication: Towards a Truly SRAM-Based FPGA On-Line Concurrent Testing
The reusing of the same hardware resources to implement speed-critical algorithms, without interrupting system operation, is one of the main reasons for the increasing use of reco...
Manuel G. Gericota, Gustavo R. Alves, Miguel L. Si...