2778 search results - page 115 / 556 » Reuse Technique in Hardware Design |
159
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IWSOC
2003
IEEE
15 years 11 months ago
2003
IEEE
This paper addresses some fundamental issues relating to the design of systems on chip that utilize optical interconnects. We present an information theoretical model for assessin...
191
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MICRO
2002
IEEE
15 years 11 months ago
2002
IEEE
Clustering is a common technique to overcome the wire delay problem incurred by the evolution of technology. Fully-distributed architectures, where the register file, the functio...
153
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VTS
2000
IEEE
15 years 10 months ago
2000
IEEE
Redundancy techniques are commonly used to design dependable systems to ensure high reliability, availability and data integrity. Triple Modular Redundancy (TMR) is a widely used ...
153
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ISQED
2008
IEEE
16 years 21 days ago
2008
IEEE
We proposed a combined magnetic and circuit level technique to explore the design methodology of SpinTorque Transfer RAM (SPRAM). A dynamic magnetic model of magnetic tunneling ju...
143
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MICRO
2008
IEEE
16 years 21 days ago
2008
IEEE
—Negative bias temperature instability (NBTI), which reduces the lifetime of PMOS transistors, is becoming a growing reliability concern for sub-micrometer CMOS technologies. Par...