Sciweavers

2778 search results - page 112 / 556
» Reuse Technique in Hardware Design
Sort
View
DAC
1997
ACM
15 years 10 months ago
A Parallel/Serial Trade-Off Methodology for Look-Up Table Based Decoders
A methodology for architecture exploration of look-up table based decoders is presented. For the degree of parallel processing a trade-off can be made by exploring system level an...
Claus Schneider
DATE
2004
IEEE
136views Hardware» more  DATE 2004»
15 years 10 months ago
An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems
Recently a lot of multimedia applications are emerging on portable appliances. They require both the flexibility of upgradeable devices (traditionally software based) and a powerf...
Michele Borgatti, Andrea Capello, Umberto Rossi, J...
DATE
2003
IEEE
128views Hardware» more  DATE 2003»
15 years 11 months ago
Virtual Compression through Test Vector Stitching for Scan Based Designs
We propose a technique for compressing test vectors. The technique reduces test application time and tester memory requirements by utilizing part of the predecessor response in co...
Wenjing Rao, Alex Orailoglu
ISLPED
2004
ACM
102views Hardware» more  ISLPED 2004»
15 years 11 months ago
Microarchitectural power modeling techniques for deep sub-micron microprocessors
The need to perform early design studies that combine architectural simulation with power estimation has become critical as power has become a design constraint whose importance h...
Nam Sung Kim, Taeho Kgil, Valeria Bertacco, Todd M...
MICRO
2009
IEEE
148views Hardware» more  MICRO 2009»
16 years 28 days ago
Flip-N-Write: a simple deterministic technique to improve PRAM write performance, energy and endurance
The phase-change random access memory (PRAM) technology is fast maturing to production levels. Main advantages of PRAM are non-volatility, byte addressability, in-place programmab...
Sangyeun Cho, Hyunjin Lee