2778 search results - page 106 / 556 » Reuse Technique in Hardware Design |
153
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VTS
2003
IEEE
15 years 11 months ago
2003
IEEE
1 We propose a test resource partitioning and optimization technique for core-based designs. Our technique includes test set selection and test resource floor-planning with the ai...
138
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ISLPED
2006
ACM
16 years 7 days ago
2006
ACM
This paper addresses the problem of low-power fanout optimization. We show that due to neglecting short-circuit current, previous analytical techniques proposed to optimize the ar...
170
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ICCD
2003
IEEE
16 years 3 months ago
2003
IEEE
With the circuit density available in today’s ASIC design systems, increased integration is possible creating more complexity in the design of a System on a Chip (SoC). IBM’s ...
184
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ISLPED
1996
ACM
15 years 10 months ago
1996
ACM
In this paper, we present a new statistical technique for estimation of average power dissipation in digital circuits. Present statistical techniques estimate the average power ba...
163
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ISLPED
1999
ACM
15 years 10 months ago
1999
ACM
While guarded evaluation has proven an effective energy saving technique in arithmetic circuits, good methodologies do not exist for determining when and how to guard for maximal ...