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ISQED
2009
IEEE
70views Hardware» more  ISQED 2009»
16 years 1 months ago
Place and route considerations for voltage interpolated designs
— Voltage interpolation is a promising post fabrication technique for combating the effects of process variations. The benefits of voltage interpolation are well understood. It...
Kevin Brownell, Ali Durlov Khan, David Brooks, Gu-...
DATE
2009
IEEE
98views Hardware» more  DATE 2009»
16 years 1 months ago
Test architecture design and optimization for three-dimensional SoCs
Core-based system-on-chips (SoCs) fabricated on threedimensional (3D) technology are emerging for better integration capabilities. Effective test architecture design and optimizat...
Li Jiang, Lin Huang, Qiang Xu
GLVLSI
2009
IEEE
170views VLSI» more  GLVLSI 2009»
15 years 10 months ago
Physical unclonable function and true random number generator: a compact and scalable implementation
Physical Unclonable Functions (PUF) and True Random Number Generators (TRNG) are two very useful components in secure system design. PUFs can be used to extract chip-unique signat...
Abhranil Maiti, Raghunandan Nagesh, Anand Reddy, P...
DAC
2004
ACM
16 years 7 months ago
Automated energy/performance macromodeling of embedded software
Efficient energy and performance estimation of embedded software is a critical part of any system-level design flow. Macromodeling based estimation is an attempt to speed up estim...
Anish Muttreja, Anand Raghunathan, Srivaths Ravi, ...
ISCA
1999
IEEE
94views Hardware» more  ISCA 1999»
15 years 10 months ago
Storageless Value Prediction Using Prior Register Values
This paper presents a technique called register value prediction (RVP) which uses a type of locality called register-value reuse. By predicting that an instruction will produce th...
Dean M. Tullsen, John S. Seng