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» Reuse Technique in Hardware Design
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ISLPED
2003
ACM
96views Hardware» more  ISLPED 2003»
15 years 11 months ago
Effective graph theoretic techniques for the generalized low power binding problem
This paper proposes two very fast graph theoretic heuristics for the low power binding problem given fixed number of resources and multiple architectures for the resources. First...
Azadeh Davoodi, Ankur Srivastava
DDECS
2007
IEEE
201views Hardware» more  DDECS 2007»
16 years 16 days ago
Built in Defect Prognosis for Embedded Memories
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskaran...
ASPDAC
2006
ACM
111views Hardware» more  ASPDAC 2006»
16 years 5 days ago
Power distribution techniques for dual VDD circuits
Extensive research has proposed the use of multiple on-die power supplies (VDD) for reducing power consumption in CMOS circuits. We present a detailed study and design techniques ...
Sarvesh H. Kulkarni, Dennis Sylvester
ECLIPSE
2006
ACM
16 years 5 days ago
FrUiT: IDE support for framework understanding
Frameworks provide means to reuse existing design and functionality, but first require developers to understand how to use them. Learning the correct usage of a framework can be ...
Marcel Bruch, Thorsten Schäfer, Mira Mezini
ASPDAC
2009
ACM
111views Hardware» more  ASPDAC 2009»
16 years 21 days ago
A UML-based approach for heterogeneous IP integration
- With increasing availability of predefined IP (Intellectual Properties) blocks and inexpensive microprocessors, embedded system designers are faced with more design choices than ...
Zhenxin Sun, Weng-Fai Wong