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ICCAD
2006
IEEE
101views Hardware» more  ICCAD 2006»
16 years 3 months ago
Guaranteeing performance yield in high-level synthesis
Meeting timing constraint is one of the most important issues for modern design automation tools. This situation is exacerbated with the existence of process variation. Current hi...
Wei-Lun Hung, Xiaoxia Wu, Yuan Xie
ASPLOS
2009
ACM
16 years 1 months ago
Performance analysis of accelerated image registration using GPGPU
This paper presents a performance analysis of an accelerated 2-D rigid image registration implementation that employs the Compute Unified Device Architecture (CUDA) programming e...
Peter Bui, Jay B. Brockman
DFT
2009
IEEE
189views VLSI» more  DFT 2009»
16 years 1 months ago
Analyzing Formal Verification and Testing Efforts of Different Fault Tolerance Mechanisms
Pre-fabrication design verification and post-fabrication chip testing are two important stages in the product realization process. These two stages consume a large part of resourc...
Meng Zhang, Anita Lungu, Daniel J. Sorin
ICASSP
2009
IEEE
16 years 1 months ago
Resampling auxiliary data for language model adaptation in machine translation for speech
Performance of n-gram language models depends to a large extent on the amount of training text material available for building the models and the degree to which this text matches...
Sameer Maskey, Abhinav Sethy
ICASSP
2009
IEEE
16 years 1 months ago
Leveraging multiple query logs to improve language models for spoken query recognition
A voice search system requires a speech interface that can correctly recognize spoken queries uttered by users. The recognition performance strongly relies on a robust language mo...
Xiao Li, Patrick Nguyen, Geoffrey Zweig, Dan Bohus