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MICRO
2003
IEEE
96views Hardware» more  MICRO 2003»
15 years 12 months ago
Using Interaction Costs for Microarchitectural Bottleneck Analysis
Attacking bottlenecks in modern processors is difficult because many microarchitectural events overlap with each other. This parallelism makes it difficult to both (a) assign a ...
Brian A. Fields, Rastislav Bodík, Mark D. H...
ISLPED
2003
ACM
77views Hardware» more  ISLPED 2003»
15 years 12 months ago
Microprocessor pipeline energy analysis
The increase in high-performance microprocessor power consumption is due in part to the large power overhead of wideissue, highly speculative cores. Microarchitectural speculation...
Karthik Natarajan, Heather Hanson, Stephen W. Keck...
ICOIN
2001
Springer
15 years 11 months ago
Performance Analysis of QoS Routing with Network Dependant Delay Cost
This paper investigates the problem of path calcul ation of multiple metric routing. Toda ’s Internet routing is based on a single metric path selecting algorithm. Single metric...
Hahnearl Jeon, Sung-Dae Kim, Young Joon Kim, Hyung...
OOIS
2001
Springer
15 years 11 months ago
Analysis of Software Engineering Data Using Computational Intelligence Techniques
The accurate estimation of software development effort has major implications for the management of software development in the industry. Underestimates lead to time pressures tha...
Gabriel Jarillo, Giancarlo Succi, Witold Pedrycz, ...
INFOCOM
1996
IEEE
15 years 11 months ago
Time Scale Analysis of Explicit Rate Allocation in ATM Networks
Rate based congestion management for computer communication networks has been the focus of considerable research recently. Dierent variants to the end-to-end rate based algorithm ...
Anna Charny, K. K. Ramakrishnan