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QEST
2007
IEEE
16 years 28 days ago
A Petri Net Model for Evaluating Packet Buffering Strategies in a Network Processor
Previous studies have shown that buffering packets in DRAM is a performance bottleneck. In order to understand the impediments in accessing the DRAM, we developed a detailed Petri...
Girish B. C., R. Govindarajan
SIGMETRICS
1998
ACM
110views Hardware» more  SIGMETRICS 1998»
15 years 11 months ago
LoGPC: Modeling Network Contention in Message-Passing Programs
In many real applications, for example those with frequent and irregular communication patterns or those using large messages, network contention and contention for message proces...
Csaba Andras Moritz, Matthew Frank
MICRO
2010
IEEE
119views Hardware» more  MICRO 2010»
15 years 4 months ago
A Predictive Model for Dynamic Microarchitectural Adaptivity Control
Abstract--Adaptive microarchitectures are a promising solution for designing high-performance, power-efficient microprocessors. They offer the ability to tailor computational resou...
Christophe Dubach, Timothy M. Jones, Edwin V. Boni...
ICML
2009
IEEE
16 years 7 months ago
A stochastic memoizer for sequence data
We propose an unbounded-depth, hierarchical, Bayesian nonparametric model for discrete sequence data. This model can be estimated from a single training sequence, yet shares stati...
Frank Wood, Cédric Archambeau, Jan Gasthaus...
HICSS
2009
IEEE
104views Biometrics» more  HICSS 2009»
16 years 1 months ago
Towards a Procedural Model for Sustainable Information Systems Management
The increasing economical, ecological and social significance of information systems (IS) demands reorientation for IS management. Ever-growing energy consumption, waste streams, ...
Nils-Holger Schmidt, Koray Erek, Lutz Kolbe, R&uum...