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CODES
2000
IEEE
15 years 11 months ago
A method to derive application-specific embedded processing cores
The concept of system-on-a-chip is becoming increasingly popular for the integration of complex systems. New types of processor cores are now available that enable the designer to...
Olivier Hébert, Ivan C. Kraljic, Yvon Savar...
JAVA
2001
Springer
15 years 11 months ago
Runtime optimizations for a Java DSM implementation
Jackal is a fine-grained distributed shared memory implementation of the Java programming language. Jackal implements Java’s memory model and allows multithreaded Java programs...
Ronald Veldema, Rutger F. H. Hofman, Raoul Bhoedja...
SIAMCOMP
1998
117views more  SIAMCOMP 1998»
15 years 6 months ago
The Queue-Read Queue-Write PRAM Model: Accounting for Contention in Parallel Algorithms
This paper introduces the queue-read, queue-write (qrqw) parallel random access machine (pram) model, which permits concurrent reading and writing to shared memory locations, but ...
Phillip B. Gibbons, Yossi Matias, Vijaya Ramachand...
CODES
2009
IEEE
16 years 1 months ago
An on-chip interconnect and protocol stack for multiple communication paradigms and programming models
A growing number of applications, with diverse requirements, are integrated on the same System on Chip (SoC) in the form of hardware and software Intellectual Property (IP). The d...
Andreas Hansson, Kees Goossens
SIGCOMM
2009
ACM
16 years 1 months ago
Crossbow: from hardware virtualized NICs to virtualized networks
This paper describes a new architecture for achieving network virtualization using virtual NICs (VNICs) as the building blocks. The VNICs can be associated with dedicated and inde...
Sunay Tripathi, Nicolas Droux, Thirumalai Srinivas...