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DATE
2010
IEEE
146views Hardware» more  DATE 2010»
15 years 12 months ago
Leveraging application-level requirements in the design of a NoC for a 4G SoC - a case study
—In this paper, we examine the design process of a Network on-Chip (NoC) for a high-end commercial System onChip (SoC) application. We present several design choices and focus on...
Rudy Beraha, Isask'har Walter, Israel Cidon, Avino...
FDL
2004
IEEE
15 years 10 months ago
SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip
Reconfigurability is becoming an important part of System-on-Chip (SoC) design to cope with the increasing demands for simultaneous flexibility and computational power. Current ha...
Kari Tiensyrjä, Miroslav Cupák, Kostas...
CRITICAL
2005
15 years 8 months ago
Participatory design: the will to succeed
With its 10th biannual anniversary conference, Participatory Design (PD) is leaving its teens and must now be considered ready to join the adult world. In this article we encourag...
Dan Shapiro
KDD
2010
ACM
287views Data Mining» more  KDD 2010»
15 years 8 months ago
Designing efficient cascaded classifiers: tradeoff between accuracy and cost
We propose a method to train a cascade of classifiers by simultaneously optimizing all its stages. The approach relies on the idea of optimizing soft cascades. In particular, inst...
Vikas C. Raykar, Balaji Krishnapuram, Shipeng Yu
ASAP
2007
IEEE
97views Hardware» more  ASAP 2007»
15 years 8 months ago
FPGA-Based Efficient Design Approach for Large-Size Two's Complement Squarers
This paper presents an optimized design approach of two’s complement large-size squarers using embedded multipliers in FPGAs. The realization is based on BaughWooley’s algorit...
Shuli Gao, Noureddine Chabini, Dhamin Al-Khalili, ...