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CODES
2006
IEEE
16 years 16 days ago
System-level power-performance trade-offs in bus matrix communication architecture synthesis
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
DATE
2006
IEEE
152views Hardware» more  DATE 2006»
16 years 16 days ago
Adaptive chip-package thermal analysis for synthesis and design
Ever-increasing integrated circuit (IC) power densities and peak temperatures threaten reliability, performance, and economical cooling. To address these challenges, thermal analy...
Yonghong Yang, Zhenyu (Peter) Gu, Changyun Zhu, Li...
ICDE
2006
IEEE
133views Database» more  ICDE 2006»
16 years 15 days ago
A New Approach for Reactive Web Usage Data Processing
— Web usage mining exploits data mining techniques to discover valuable information from navigation behavior of World Wide Web (WWW) users. The required information is captured b...
Murat Ali Bayir, Ismail Hakki Toroslu, Ahmet Cosar
ICMCS
2006
IEEE
215views Multimedia» more  ICMCS 2006»
16 years 15 days ago
Biologically vs. Logic Inspired Encoding of Facial Actions and Emotions in Video
Automatic facial expression analysis is an important aspect of Human Machine Interaction as the face is an important communicative medium. We use our face to signal interest, disa...
Michel François Valstar, Maja Pantic
IEEEPACT
2006
IEEE
16 years 15 days ago
Testing implementations of transactional memory
Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software....
Chaiyasit Manovit, Sudheendra Hangal, Hassan Chafi...
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