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ISCA
2009
IEEE
146views Hardware» more  ISCA 2009»
16 years 1 months ago
Multi-execution: multicore caching for data-similar executions
While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...
Susmit Biswas, Diana Franklin, Alan Savage, Ryan D...
ISCA
2009
IEEE
152views Hardware» more  ISCA 2009»
16 years 1 months ago
Scaling the bandwidth wall: challenges in and avenues for CMP scaling
As transistor density continues to grow at an exponential rate in accordance to Moore’s law, the goal for many Chip Multi-Processor (CMP) systems is to scale the number of on-ch...
Brian M. Rogers, Anil Krishna, Gordon B. Bell, Ken...
ISMAR
2009
IEEE
16 years 1 months ago
Dynamic seethroughs: Synthesizing hidden views of moving objects
This paper presents a method to create an illusion of seeing moving objects through occluding surfaces in a video. This illusion is achieved by transferring information from a cam...
Peter Barnum, Yaser Sheikh, Ankur Datta, Takeo Kan...
MICRO
2009
IEEE
129views Hardware» more  MICRO 2009»
16 years 1 months ago
Execution leases: a hardware-supported mechanism for enforcing strong non-interference
High assurance systems such as those found in aircraft controls and the financial industry are often required to handle a mix of tasks where some are niceties (such as the contro...
Mohit Tiwari, Xun Li, Hassan M. G. Wassel, Frederi...
MICRO
2009
IEEE
132views Hardware» more  MICRO 2009»
16 years 1 months ago
EazyHTM: eager-lazy hardware transactional memory
Transactional Memory aims to provide a programming model that makes parallel programming easier. Hardware implementations of transactional memory (HTM) suffer from fewer overhead...
Sasa Tomic, Cristian Perfumo, Chinmay Eishan Kulka...
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