12670 search results - page 2370 / 2534 » Requirements Modeling |
172
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DAC
2002
ACM
16 years 7 months ago
2002
ACM
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
142
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DAC
2002
ACM
16 years 7 months ago
2002
ACM
We propose Satisfiability Checking (SAT) techniques that lead to a consistent performance improvement of up to 3x over state-ofthe-art SAT solvers like Chaff on important problem ...
171
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DAC
2004
ACM
16 years 7 months ago
2004
ACM
Long design cycles due to the inability to predict silicon realities is a well-known problem that plagues analog/RF integrated circuit product development. As this problem worsens...
138
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
The delay fault test pattern set generated by timing unaware commercial ATPG tools mostly affects very short paths, thereby increasing the escape chance of smaller delay defects. ...
194
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ICML
1999
IEEE
16 years 7 months ago
1999
IEEE
Excerpted from: Boyan, Justin. Learning Evaluation Functions for Global Optimization. Ph.D. thesis, Carnegie Mellon University, August 1998. (Available as Technical Report CMU-CS-...