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DATE
2008
IEEE
121views Hardware» more  DATE 2008»
16 years 24 days ago
A Bridging Fault Model Where Undetectable Faults Imply Logic Redundancy
We define a robust fault model as a model where the existence of an undetectable fault implies the existence of logic redundancy, or more generally, a suboptimality in the synthe...
Irith Pomeranz, Sudhakar M. Reddy
ICCCN
2008
IEEE
16 years 24 days ago
Fair Randomized Antenna Allocation in Asynchronous MIMO Multi-Hop Networks
Abstract—Previous work has shown that CSMA-based protocols such as the IEEE 802.11 can yield flow starvation in multihop wireless networks. While prior protocol designs alleviat...
Ahmed Khattab, Ashutosh Sabharwal, Edward W. Knigh...
NDSS
2008
IEEE
16 years 22 days ago
A New Privacy-Enhanced Matchmaking Protocol
Although several wide-spread internet applications (e.g., job-referral services, dating services) can benefit from online matchmaking, protocols defined over the past two decade...
Ji Sun Shin, Virgil D. Gligor
SCAM
2008
IEEE
16 years 22 days ago
Rejuvenate Pointcut: A Tool for Pointcut Expression Recovery in Evolving Aspect-Oriented Software
Aspect-Oriented Programming (AOP) strives to localize the scattered and tangled implementations of crosscutting concerns (CCCs) by allowing developers to declare that certain acti...
Raffi Khatchadourian, Awais Rashid
AINA
2007
IEEE
16 years 21 days ago
Synthetic Trace-Driven Simulation of Cache Memory
The widening gap between CPU and memory speed has made caches an integral feature of modern highperformance processors. The high degree of configurability of cache memory can requ...
Rahman Hassan, Antony Harris, Nigel P. Topham, Ari...