Clock gating is the insertion of combinational logic along the clock path to prevent the unnecessary switching of registers and reduce dynamic power consumption. The conditions un...
It is known that ramp-based models are not sufficient for accurate timing modeling. In this paper, we develop a technique that accurately models the waveforms, and also allows a f...
Anand Ramalingam, Ashish Kumar Singh, Sani R. Nass...
This paper presents a technique for preprocessing combinational logic before technology mapping. The technique is based on the representation of combinational logic using And-Inve...
Alan Mishchenko, Satrajit Chatterjee, Robert K. Br...
Practical data mining rarely falls exactly into the supervised learning scenario. Rather, the growing amount of unlabeled data poses a big challenge to large-scale semi-supervised...
Many techniques in the social sciences and graph theory deal with the problem of examining and analyzing patterns found in the underlying structure and associations of a group of ...
Jeremy Kubica, Andrew W. Moore, David Cohn, Jeff G...