96 search results - page 9 / 20 » Reliable Laser Programmable Gate Array Technology |
142
Voted
ERSA
2006
15 years 7 months ago
2006
- This paper presents the design and implementation methodology of some low power programmable FIR filtering IP cores targeting SoRC and compares their performance in term of area,...
150
Voted
DATE
2009
IEEE
16 years 17 days ago
2009
IEEE
—Interconnect structures significantly contribute to the delay, power consumption, and silicon area of modern reconfigurable architectures. The demand for higher clock frequencie...
145
Voted
HAPTICS
2005
IEEE
15 years 11 months ago
2005
IEEE
Wearable haptics necessitates using low power, small, inexpensive tactors that are typically used as pager motors in cellular phones. One of their limitations is that it appears t...
165
Voted
ICVS
2001
Springer
15 years 10 months ago
2001
Springer
Abstract. At the first ICVS, we presented SA-C (“sassy”), a singleassignment variant of the C programming language designed to exploit both coarse-grain and fine-grain parallel...
157
Voted
FPGA
2001
ACM
15 years 10 months ago
2001
ACM
Conventional technology mapping algorithms for SRAM-based Field Programmable Gate Arrays (FPGAs) are normally carried out on a fixed logic decomposition of a circuit. The impact o...