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EDCC
2008
Springer
15 years 8 months ago
A Transient-Resilient System-on-a-Chip Architecture with Support for On-Chip and Off-Chip TMR
The ongoing technological advances in the semiconductor industry make Multi-Processor System-on-a-Chips (MPSoCs) more attractive, because uniprocessor solutions do not scale satis...
Roman Obermaisser, Hubert Kraut, Christian El Sall...
DCC
2010
IEEE
16 years 1 months ago
Lossless Compression Based on the Sequence Memoizer
In this work we describe a sequence compression method based on combining a Bayesian nonparametric sequence model with entropy encoding. The model, a hierarchy of Pitman-Yor proce...
Jan Gasthaus, Frank Wood, Yee Whye Teh
RTCSA
2006
IEEE
16 years 18 days ago
Predictable Interrupt Scheduling with Low Overhead for Real-Time Kernels
In this paper we analyze the traditional model of interrupt management and its inability to incorporate the reliability and temporal predictability demanded by real-time systems. ...
Luis E. Leyva-del-Foyo, Pedro Mejía-Alvarez...
INFOCOM
2009
IEEE
16 years 1 months ago
Absence of Evidence as Evidence of Absence: A Simple Mechanism for Scalable P2P Search
Abstract—We propose a novel search mechanism for unstructured p2p networks, and show that it is both scalable, i.e., it leads to a bounded query traffic load per peer as the pee...
Stratis Ioannidis, Peter Marbach
DATE
2007
IEEE
74views Hardware» more  DATE 2007»
16 years 28 days ago
Joint consideration of fault-tolerance, energy-efficiency and performance in on-chip networks
High reliability against noise, low energy consumption and high performance are key objectives in the design of on-chip networks. Recently some researchers have considered the var...
Alireza Ejlali, Bashir M. Al-Hashimi, Paul M. Rosi...