In this paper we present a novel processor microarchitecture that relieves three of the most important bottlenecks of superscalar processors: the serialization imposed by true dep...
The Multiscalar architecture advocates a distributed processor organization and task-level speculation to exploit high degrees of instruction level parallelism (ILP) in sequential...
In this paper, we derive a statistical delay guarantee of the generalized Virtual Clock scheduling algorithm. We define the concept of an equivalent fluid and packet source and pr...
We present an experiment on cooperative bimanual action. Right-handed subjects manipulated a pair of physical objects, a tool and a target object, so that the tool would touch a t...
Ken Hinckley, Randy F. Pausch, Dennis Proffitt, Ja...
The requirement to change scale frequently is common to many 2D and 3D applications. Users must “zoom in” to examine details and “zoom out” to appreciate the context. This...