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ICCD
2008
IEEE
116views Hardware» more  ICCD 2008»
16 years 3 months ago
Prototyping a hybrid main memory using a virtual machine monitor
— We use a novel virtualization-based approach for computer architecture performance analysis. We present a case study analyzing a hypothetical hybrid main memory, which consists...
Dong Ye, Aravind Pavuluri, Carl A. Waldspurger, Br...
ICCD
2007
IEEE
157views Hardware» more  ICCD 2007»
16 years 3 months ago
Combining cluster sampling with single pass methods for efficient sampling regimen design
Microarchitectural simulation is orders of magnitude slower than native execution. As more elements are accurately modeled, problems associated with slow simulation are further ex...
Paul D. Bryan, Thomas M. Conte
ICCAD
2005
IEEE
176views Hardware» more  ICCAD 2005»
16 years 3 months ago
Statistical gate sizing for timing yield optimization
— Variability in the chip design process has been relatively increasing with technology scaling to smaller dimensions. Using worst case analysis for circuit optimization severely...
Debjit Sinha, Narendra V. Shenoy, Hai Zhou
SOFSEM
2010
Springer
16 years 3 months ago
Practically Applicable Formal Methods
Abstract. Formal methods are considered to be highly expensive. Therefore, they are currently applied almost only in high risk software development. In this paper, we show that for...
Jedrzej Fulara, Krzysztof Jakubczyk
SOFSEM
2010
Springer
16 years 3 months ago
Fast Arc-Annotated Subsequence Matching in Linear Space
An arc-annotated string is a string of characters, called bases, augmented with a set of pairs, called arcs, each connecting two bases. Given arc-annotated strings P and Q the arc-...
Philip Bille, Inge Li Gørtz
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