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» Reducing the Complexity of Reductions
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CVPR
2009
IEEE
17 years 1 months ago
Higher-Order Clique Reduction in Binary Graph Cut
We introduce a new technique that can reduce any higher-order Markov random field with binary labels into a first-order one that has the same minima as the original. Moreover, w...
Hiroshi Ishikawa 0002
DAC
2006
ACM
16 years 7 months ago
Fast analysis of structured power grid by triangularization based structure preserving model order reduction
In this paper, a Triangularization Based Structure preserving (TBS) model order reduction is proposed to verify power integrity of on-chip structured power grid. The power grid is...
Hao Yu, Yiyu Shi, Lei He
ICFP
2002
ACM
16 years 6 months ago
A compiled implementation of strong reduction
Motivated by applications to proof assistants based on dependent types, we develop and prove correct a strong reducer and equivalence checker for the -calculus with products, sums...
Benjamin Grégoire, Xavier Leroy
ICCD
2003
IEEE
89views Hardware» more  ICCD 2003»
16 years 3 months ago
Precomputation-based Guarding for Dynamic and Leakage Power Reduction
- This paper presents a precomputation-based guarding technique to reduce both dynamic and static power consumptions in CMOS VLSI circuits. More precisely, a high threshold sleep t...
Afshin Abdollahi, Massoud Pedram, Farzan Fallah, I...
DATE
2009
IEEE
93views Hardware» more  DATE 2009»
16 years 1 months ago
Test cost reduction for multiple-voltage designs with bridge defects through Gate-Sizing
Abstract—Multiple-voltage is an effective dynamic power reduction design technique. Recent research has shown that testing for resistive bridging faults in such designs requires ...
S. Saqib Khursheed, Bashir M. Al-Hashimi, Peter Ha...