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» Reducing the Complexity of Reductions
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ICCAD
2008
IEEE
109views Hardware» more  ICCAD 2008»
16 years 27 days ago
Transition-aware decoupling-capacitor allocation in power noise reduction
— Dynamic power noises may not only degrade the circuit performance but also reduce the noise margin which may result in the functional errors in integrated circuit. Decoupling c...
Po-Yuan Chen, Che-Yu Liu, TingTing Hwang
ISLPED
2005
ACM
109views Hardware» more  ISLPED 2005»
16 years 9 hour ago
Power reduction by varying sampling rate
The rate at which a digital signal processing (DSP) system operates depends on the highest frequency component in the input signal. DSP applications must sample their inputs at a ...
William R. Dieter, Srabosti Datta, Wong Key Kai
ASPDAC
2005
ACM
131views Hardware» more  ASPDAC 2005»
15 years 8 months ago
Analysis of buffered hybrid structured clock networks
- This paper presents a novel approach for fast transient analysis of buffered hybrid structured clock networks. The new method applies structure reduction and relaxed hierarchical...
Yi Zou, Qiang Zhou, Yici Cai, Xianlong Hong, Sheld...
COMPGEOM
1998
ACM
15 years 10 months ago
Geometric Applications of a Randomized Optimization Technique
Abstract. We propose a simple, general, randomized technique to reduce certain geometric optimization problems to their corresponding decision problems. These reductions increase t...
Timothy M. Chan
IEEECIT
2010
IEEE
15 years 5 months ago
Exploiting More Parallelism from Applications Having Generalized Reductions on GPU Architectures
Reduction is a common component of many applications, but can often be the limiting factor for parallelization. Previous reduction work has focused on detecting reduction idioms a...
Xiao-Long Wu, Nady Obeid, Wen-Mei Hwu