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ISCA
2005
IEEE
131views Hardware» more  ISCA 2005»
16 years 7 days ago
BugNet: Continuously Recording Program Execution for Deterministic Replay Debugging
Significant time is spent by companies trying to reproduce and fix the bugs that occur for released code. To assist developers, we propose the BugNet architecture to continuousl...
Satish Narayanasamy, Gilles Pokam, Brad Calder
ISCAS
2005
IEEE
144views Hardware» more  ISCAS 2005»
16 years 7 days ago
Impact of multicycled scheduling on power-area tradeoffs in behavioural synthesis
— Multicycling is a widely investigated technique for performance optimisation in behavioural synthesis. It allows an operation to execute over two or more control steps with the...
M. A. Ochoa-Montiel, Bashir M. Al-Hashimi, Peter K...
LICS
2005
IEEE
16 years 6 days ago
Proof-Theoretic Approach to Description-Logic
In recent work Baader has shown that a certain description logic with conjunction, existential quantification and with circular definitions has a polynomial time subsumption pro...
Martin Hofmann
160
Voted
SKG
2005
IEEE
16 years 6 days ago
A Heuristic Algorithm for Task Scheduling Based on Mean Load
Efficient task scheduling is critical to achieving high performance on grid computing environment. A heuristic task scheduling algorithm satisfied resources load balancing on grid ...
Lina Ni, Jinquan Zhang, ChunGang Yan, Changjun Jia...
VISUALIZATION
2005
IEEE
16 years 6 days ago
The Visible Radio: Process Visualization of a Software-Defined Radio
In this case study, a data-oriented approach is used to visualize a complex digital signal processing pipeline. The pipeline implements a Frequency Modulated (FM) Software-Defined...
Matthew Hall, Alex Betts, Donna Cox, David Pointer...
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