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ISQED
2003
IEEE
134views Hardware» more  ISQED 2003»
15 years 12 months ago
Concurrent Fault Detection in Random Combinational Logic
We discuss a non-intrusive methodology for concurrent fault detection in random combinational logic. The proposed method is similar to duplication, wherein a replica of the circui...
Petros Drineas, Yiorgos Makris
ITC
2003
IEEE
176views Hardware» more  ITC 2003»
15 years 12 months ago
Instruction Based BIST for Board/System Level Test of External Memories and Internconnects
ct This paper describes a general technique to test external memory/caches and memory interconnects using on-chip logic. Such a test methodology is expected to significantly reduc...
Olivier Caty, Ismet Bayraktaroglu, Amitava Majumda...
MTDT
2003
IEEE
105views Hardware» more  MTDT 2003»
15 years 12 months ago
A Testability-Driven Optimizer and Wrapper Generator for Embedded Memories
Memory cores (especially SRAM cores) used on a system chip usually come from a memory compiler. Commercial memory compilers have their limitation— a large memory may need to be ...
Rei-Fu Huang, Li-Ming Denq, Cheng-Wen Wu, Jin-Fu L...
SSDBM
2003
IEEE
136views Database» more  SSDBM 2003»
15 years 12 months ago
Acceleration of Relational Index Structures Based on Statistics
Relational index structures, as for instance the Relational Interval Tree, the Relational R-Tree, or the Linear Quadtree, support efficient processing of queries on top of existin...
Hans-Peter Kriegel, Peter Kunath, Martin Pfeifle, ...
STEP
2003
IEEE
15 years 12 months ago
On Analysis of Design Component Contracts: A Case Study
Software patterns are a new design paradigm used to solve problems that arise when developing software within a particular context. Patterns capture the static and dynamic structu...
Jing Dong, Paulo S. C. Alencar, Donald D. Cowan