Sciweavers

3702 search results - page 409 / 741
» Reducing Misclassification Costs
Sort
View
PLDI
1999
ACM
15 years 11 months ago
Cache-Conscious Structure Layout
Hardware trends have produced an increasing disparity between processor speeds and memory access times. While a variety of techniques for tolerating or reducing memory latency hav...
Trishul M. Chilimbi, Mark D. Hill, James R. Larus
ICS
1999
Tsinghua U.
15 years 11 months ago
Realizing the performance potential of the virtual interface architecture
The Virtual Interface (VI) Architecture provides protected userlevel communication with high delivered bandwidth and low permessage latency, particularly for small messages. The V...
Evan Speight, Hazim Abdel-Shafi, John K. Bennett
ASPDAC
2006
ACM
148views Hardware» more  ASPDAC 2006»
15 years 10 months ago
TAPHS: thermal-aware unified physical-level and high-level synthesis
Thermal effects are becoming increasingly important during integrated circuit design. Thermal characteristics influence reliability, power consumption, cooling costs, and performan...
Zhenyu (Peter) Gu, Yonghong Yang, Jia Wang, Robert...
CASES
2005
ACM
15 years 8 months ago
MTSS: multi task stack sharing for embedded systems
Out-of-memory errors are a serious source of unreliability in most embedded systems [22]. Applications run out of main memory because of the frequent difficulty of estimating the ...
Bhuvan Middha, Matthew Simpson, Rajeev Barua
DBA
2006
236views Database» more  DBA 2006»
15 years 8 months ago
Quantizing Time Series for Efficient Subsequence Matching
Indexing time series data is an interesting problem that has attracted much interest in the research community for the last decade. Traditional indexing methods organize the data ...
Inés Fernando Vega López, Bongki Moo...