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MICRO
2003
IEEE
109views Hardware» more  MICRO 2003»
16 years 1 days ago
TLC: Transmission Line Caches
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
Bradford M. Beckmann, David A. Wood
CIKM
2009
Springer
15 years 11 months ago
Space-economical partial gram indices for exact substring matching
Exact substring matching queries on large data collections can be answered using q-gram indices, that store for each occurring q-byte pattern an (ordered) posting list with the po...
Nan Tang, Lefteris Sidirourgos, Peter A. Boncz
ISLPED
1997
ACM
108views Hardware» more  ISLPED 1997»
15 years 11 months ago
Techniques for low energy software
The energy consumption of a system depends upon the hardware and software component of a system. Since it is the software which drives the hardware in most systems, decisions take...
Huzefa Mehta, Robert Michael Owens, Mary Jane Irwi...
CASES
2005
ACM
15 years 8 months ago
A post-compilation register reassignment technique for improving hamming distance code compression
Code compression is a field where compression ratios between compiler-generated code and subsequent compressed code are highly dependent on decisions made at compile time. Most op...
Montserrat Ros, Peter Sutton
ICCAD
2009
IEEE
87views Hardware» more  ICCAD 2009»
15 years 4 months ago
Mitigation of intra-array SRAM variability using adaptive voltage architecture
SRAM cell design is driven by the need to satisfy static noise margin, write margin and read current margin (RCM) over all cells in the array in an energy-efficient manner. These ...
Ashish Kumar Singh, Ku He, Constantine Caramanis, ...