This paper presents a model checking-based approach to data flow testing. We characterize data flow oriented coverage criteria in temporal logic such that the problem of test ge...
In this paper we describe a methodology for the formal verification of a DSP chip using the HOL theorem prover. We used an iterative method to specify both the behavioral and stru...
Distributed denial-of-service (DDoS) attacks present an Internet-wide threat. We propose D-WARD, a DDoS defense system deployed at source-end networks that autonomously detects an...
We present a new fast method of modeling 3-D objects of arbitrary topology. The Level Set Methods have been used by many researchers to recover 3-D shapes of arbitrary topology. H...
: Since modern programmable devices contain embedded memory blocks, there exists a possibility to implement Finite State Machines (FSM) using such blocks. The size of the memory av...