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IPPS
2000
IEEE
15 years 11 months ago
Reconfigurable Parallel Sorting and Load Balancing on a Beowulf Cluster: HeteroSort
HeteroSort load balances and sorts within static or dynamic networks using a conceptual torus mesh. We ported HeteroSort to a 16-node Beowulf cluster with a central switch architec...
Pamela Yang, Timothy M. Kunau, Bonnie Holte Bennet...
FCCM
1999
IEEE
127views VLSI» more  FCCM 1999»
15 years 11 months ago
Mapping of an Automated Target Recognition Application from a Graphical Software Environment to FPGA-Based Reconfigurable Hardwa
A significant obstacle to the widespread adoption of FPGAbased configurable computing hardware has been the difficulty of mapping applications onto this hardware. We are developin...
Benjamin A. Levine, Senthil Natarajan, Chandra Tan...
SAC
1995
ACM
15 years 10 months ago
Design of a VLSI very high speed reconfigurable digital fuzzy processor
A trigger system in High Energy Physics Experiments (HEPE) has to decide, in few µs, if the data related to a nuclear event have to be stored or not. Normally, these data, are co...
Enzo Gandolfi, Alessandro Gabrielli, Massimo Maset...
JCP
2008
119views more  JCP 2008»
15 years 6 months ago
Performance Comparisons, Design, and Implementation of RC5 Symmetric Encryption Core using Reconfigurable Hardware
With the wireless communications coming to homes and offices, the need to have secure data transmission is of utmost importance. Today, it is important that information is sent con...
Omar S. Elkeelany, Adegoke Olabisi
FCCM
2000
IEEE
105views VLSI» more  FCCM 2000»
15 years 11 months ago
Configuration Relocation and Defragmentation for Reconfigurable Computing
Custom computing systems exhibit significant speedups over traditional microprocessors by mapping compute-intensive sections of a program to reconfigurable logic [Hauck98]. Howeve...
Katherine Compton, James Cooley, Stephen Knol, Sco...