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FPL
2007
Springer
98views Hardware» more  FPL 2007»
15 years 8 months ago
Module Graph Merging and Placement to Reduce Reconfiguration Overheads in Paged FPGA Devices
Reconfiguration time in dynamically-reconfigurable modular systems can severely limit application run-time compared to the critical path delay. In this paper we present a novel ...
Shannon Koh, Oliver Diessel
DATE
2003
IEEE
106views Hardware» more  DATE 2003»
15 years 11 months ago
Reconfigurable Signal Processing in Wireless Terminals
In this paper, we show the necessity of reconfigurable hardware for data and signal processing in wireless mobile terminals. We first identify the key processing power requirement...
Jürgen Helmschmidt, Eberhard Schüler, Pr...
DAC
2004
ACM
16 years 7 months ago
Virtual memory window for application-specific reconfigurable coprocessors
Reconfigurable Systems-on-Chip (SoCs) on the market consist of full-fledged processors and large Field-Programmable Gate-Arrays (FPGAs). The latter can be used to implement the sy...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
ERSA
2006
102views Hardware» more  ERSA 2006»
15 years 8 months ago
Process Isolation for Reconfigurable Hardware
One of the pillars of trust-worthy computing is process isolation, the ability to keep process data private from other processes running on the same device. While embedded operati...
Herwin Chan, Patrick Schaumont, Ingrid Verbauwhede
MAM
2007
113views more  MAM 2007»
15 years 6 months ago
A reconfigurable computing framework for multi-scale cellular image processing
Cellular computing architectures represent an important class of computation that are characterized by simple processing elements, local interconnect and massive parallelism. Thes...
Reid B. Porter, Jan R. Frigo, Al Conti, Neal R. Ha...