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CASES
2001
ACM
15 years 10 months ago
Pattern matching in reconfigurable logic for packet classification
We describe a digital circuit synthesis algorithm specialized for the domain of pattern matching circuits implemented in reconfigurable logic. We propose to use this algorithm as ...
Adam Johnson, Kenneth Mackenzie
CC
2008
Springer
240views System Software» more  CC 2008»
15 years 8 months ago
Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
Etienne Bergeron, Marc Feeley, Jean-Pierre David
CG
2004
Springer
15 years 6 months ago
Refereed digital publication of computer graphics educational materials
Computer Graphics as a discipline has undergone drastic modifications over the past decades. Indeed the phenomenal progress in both the technical and digital art domains requires ...
Frederico C. Figueiredo, Dena Elisabeth Eber, Joaq...
ARC
2007
Springer
140views Hardware» more  ARC 2007»
15 years 10 months ago
Reconfigurable Computing for Accelerating Protein Folding Simulations
Abstract. This paper presents a methodology for the design of a reconfigurable computing system applied to a complex problem in molecular Biology: the protein folding problem. An e...
Nilton B. Armstrong, Heitor S. Lopes, Carlos R. Er...
FCCM
2008
IEEE
133views VLSI» more  FCCM 2008»
15 years 8 months ago
Runtime Filesystem Support for Reconfigurable FPGA Hardware Processes in BORPH
This paper presents the design of BORPH's file system layer for FPGA-based reconfigurable computers. BORPH provides user FPGA designs that execute as hardware processes acces...
Hayden Kwok-Hay So, Robert W. Brodersen