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FCCM
2003
IEEE
148views VLSI» more  FCCM 2003»
15 years 11 months ago
A Hardware Gaussian Noise Generator for Channel Code Evaluation
Hardware simulation of channel codes offers the potential of improving code evaluation speed by orders of magnitude over workstation- or PC-based simulation. We describe a hardwar...
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y...
HPDC
2000
IEEE
15 years 10 months ago
Creating Large Scale Database Servers
The BaBar experiment at the Stanford Linear Accelerator Center (SLAC) is designed to perform a high precision investigation of the decays of the B-meson produced from electron-pos...
Jacek Becla, Andrew Hanushevsky
SIGGRAPH
2000
ACM
15 years 10 months ago
The WarpEngine: an architecture for the post-polygonal age
We present the WarpEngine, an architecture designed for realtime image-based rendering of natural scenes from arbitrary viewpoints. The modeling primitives are real-world images w...
Voicu Popescu, John G. Eyles, Anselmo Lastra, Josh...
ICPP
1999
IEEE
15 years 10 months ago
Coherence-Centric Logging and Recovery for Home-Based Software Distributed Shared Memory
The probability of failures in software distributed shared memory (SDSM) increases as the system size grows. This paper introduces a new, efficient message logging technique, call...
Angkul Kongmunvattana, Nian-Feng Tzeng
ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
15 years 11 months ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks
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